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micropower single-supply rail-to-rail input/output op amps op191/op291/op491 rev. e information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?1994C2010 analog devices, inc. all rights reserved. features single-supply operation: 2.7 v to 12 v wide input voltage range rail-to-rail output swing low supply current: 300 a/amp wide bandwidth: 3 mhz slew rate: 0.5 v/s low offset voltage: 700 v no phase reversal applications industrial process control battery-powered instrumentation power supply control and protection telecommunications remote sensors low voltage strain gage amplifiers dac output amplifiers pin configurations nc = no connect op191 nc 1 ? ina 2 + ina 3 ?v 4 nc +v outa nc 8 7 6 5 00294-001 op291 outa 1 ?ina 2 +ina 3 ?v 4 +v outb ?inb +inb 8 7 6 5 0 0294-002 figure 1. 8-lead narrow-body soic figure 2. 8-lead narrow-body soic op491 outa 1 ?ina 2 +ina 3 +v 4 outd ?ind +ind ?v 14 13 12 11 +inb 5 ?inb 6 outb 7 +inc ?inc outc 10 9 8 00294-003 op491 outa 1 ?ina 2 +ina 3 +v 4 +inb 5 outd ?ind +ind ?v +inc 14 13 12 11 10 ?inb 6 o utb 7 ?inc outc 9 8 00294-004 + - + - + - + - figure 3. 14-lead narrow-body soic figure 4. 14-lead pdip op491 outa 1 ?ina 2 +ina 3 +v 4 outd ?ind +ind ?v 14 13 12 11 +inb 5 ?inb 6 outb 7 +inc ?inc outc 10 9 8 00294-005 figure 5. 14-lead tssop general description the op191, op291, and op491 are single, dual, and quad micropower, single-supply, 3 mhz bandwidth amplifiers featuring rail-to-rail inputs and outputs. all are guaranteed to operate from a +3 v single supply as well as 5 v dual supplies. fabricated on analog devices cbcmos process, the opx91 family has a unique input stage that allows the input voltage to safely extend 10 v beyond either supply without any phase inversion or latch-up. the output voltage swings to within millivolts of the supplies and continues to sink or source current all the way to the supplies. applications for these amplifiers include portable tele- communications equipment, power supply control and protection, and interface for transducers with wide output ranges. sensors requiring a rail-to-rail input amplifier include hall effect, piezo electric, and resistive transducers. the ability to swing rail-to-rail at both the input and output enables designers to build multistage filters in single-supply systems and to maintain high signal-to-noise ratios. the op191/op291/op491 are specified over the extended industrial C40c to +125c temperature range. the op191 single and op291 dual amplifiers are available in 8-lead plastic soic surface-mount packages. the op491 quad is available in a 14-lead pdip, a narrow 14-lead soic package, and a 14-lead tssop.
op191/op291/op491 rev. e | page 2 of 24 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? pin configurations ........................................................................... 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? electrical specifications ............................................................... 3 ? absolute maximum ratings ............................................................ 7 ? thermal resistance ...................................................................... 7 ? esd caution .................................................................................. 7 ? typical performance characteristics ............................................. 8 ? theory of operation ...................................................................... 17 ? input overvoltage protection ................................................... 18 ? output voltage phase reversal ................................................. 18 ? overdrive recovery ................................................................... 18 ? applications information .............................................................. 19 ? single 3 v supply, instrumentation amplifier ....................... 19 ? single-supply rtd amplifier ................................................... 19 ? a 2.5 v reference from a 3 v supply ...................................... 20 ? 5 v only, 12-bit dac swings rail-to-rail ............................. 20 ? a high-side current monitor .................................................. 20 ? a 3 v, cold junction compensated thermocouple amplifier ....................................................................................................... 21 ? single-supply, direct access arrangement for modems ...... 21 ? 3 v, 50 hz/60 hz active notch filter with false ground ..... 22 ? single-supply, half-wave, and full-wave rectifiers ............. 22 ? outline dimensions ....................................................................... 23 ? ordering guide .......................................................................... 24 ? revision history 4/10rev. d to rev. e changes to input voltage parameter, table 4 ............................... 7 4/06rev. c to rev. d changes to noise performance, voltage density, table 1 ........... 3 changes to noise performance, voltage density, table 2 ........... 4 changes to noise performance, voltage density, table 3 ........... 5 changes to figure 23 and figure 24 ............................................. 10 changes to figure 42 ...................................................................... 13 changes to figure 43 ...................................................................... 14 changes to figure 57 ...................................................................... 16 added figure 58 .............................................................................. 16 changed reference from figure 47 to figure 12 ........................ 17 updated outline dimensions ....................................................... 23 changes to ordering guide .......................................................... 24 3/04rev. b to rev. c. changes to op291 soic pin configuration ................................. 1 11/03rev. a to rev. b. edits to general description ........................................................... 1 edits to pin configuration ............................................................... 1 changes to ordering guide ............................................................. 5 updated outline dimensions ....................................................... 19 12/02rev. 0 to rev. a. edits to general description ........................................................... 1 edits to pin configuration ............................................................... 1 changes to ordering guide ............................................................. 5 edits to dice characteristics ............................................................ 5
op191/op291/op491 rev. e | page 3 of 24 specifications electrical specifications @ v s = 3.0 v, v cm = 0.1 v, v o = 1.4 v, t a = 25c, unless otherwise noted. table 1. parameter symbol conditions min typ max unit input characteristics offset voltage op191g v os 80 500 v ?40c t a +125c 1 mv op291g/op491g v os 80 700 v ?40c t a +125c 1.25 mv input bias current i b 30 65 na ?40c t a +125c 95 na input offset current i os 0.1 11 na ?40c t a +125c 22 na input voltage range 0 3 v common-mode rejection ratio cmrr v cm = 0 v to 2.9 v 70 90 db ?40c t a +125c 65 87 db large signal voltage gain a vo r l = 10 k, v o = 0.3 v to 2.7 v 25 70 v/mv ?40c t a +125c 50 v/mv offset voltage drift ?v os /?t 1.1 v/c bias current drift ?i b /?t 100 pa/c offset current drift ?i os /?t 20 pa/c output characteristics output voltage high v oh r l = 100 k to gnd 2.95 2.99 v ?40c to +125c 2.90 2.98 v r l = 2 k to gnd 2.8 2.9 v ?40c to +125c 2.70 2.80 v output voltage low v ol r l = 100 k to v+ 4.5 10 mv ?40c to +125c 35 mv r l = 2 k to v+ 40 75 mv ?40c to +125c 130 mv short-circuit limit i sc sink/source 8.75 13.50 ma ?40c to +125c 6.0 10.5 ma open-loop impedance z out f = 1 mhz, a v = 1 200 power supply power supply rejection ratio psrr v s = 2.7 v to 12 v 80 110 db ?40c t a +125c 75 110 db supply current/amplifier i sy v o = 0 v 200 350 a ?40c t a +125c 330 480 a dynamic performance slew rate +sr r l = 10 k 0.4 v/s slew rate Csr r l = 10 k 0.4 v/s full-power bandwidth bw p 1% distortion 1.2 khz settling time t s to 0.01% 22 s gain bandwidth product gbp 3 mhz phase margin o 45 degrees channel separation cs f = 1 khz, r l = 10 k 145 db noise performance voltage noise e n p-p 0.1 hz to 10 hz 2 v p-p voltage noise density e n f = 1 khz 30 nv/hz current noise density i n 0.8 pa/hz
op191/op291/op491 rev. e | page 4 of 24 @ v s = 5.0 v, v cm = 0.1 v, v o = 1.4 v, t a = 25c, unless otherwise noted. +5 v specifications are guaranteed by +3 v and 5 v testing. table 2. parameter symbol conditions min typ max unit input characteristics offset voltage op191 v os 80 500 v ?40c t a +125c 1.0 mv op291/op491 v os 80 700 v ?40c t a +125c 1.25 mv input bias current i b 30 65 na ?40c t a +125c 95 na input offset current i os 0.1 11 na ?40c t a +125c 22 na input voltage range 0 5 v common-mode rejection ratio cmrr v cm = 0 v to 4.9 v 70 93 db C40c t a +125c 65 90 db large signal voltage gain a vo r l = 10 k, v o = 0.3 v to 4.7 v 25 70 v/mv ?40c t a +125c 50 v/mv offset voltage drift ?v os /?t ?40c t a +125c 1.1 v/c bias current drift ?i b /?t 100 pa/c offset current drift ?i os /?t 20 pa/c output characteristics output voltage high v oh r l = 100 k to gnd 4.95 4.99 v ?40c to +125c 4.90 4.98 v r l = 2 k to gnd 4.8 4.85 v ?40c to +125c 4.65 4.75 v output voltage low v ol r l = 100 k to v+ 4.5 10 mv ?40c to +125c 35 mv r l = 2 k to v+ 40 75 mv ?40c to +125c 155 mv short-circuit limit i sc sink/source 8.75 13.5 ma ?40c to +125c 6.0 10.5 ma open-loop impedance z out f = 1 mhz, a v = 1 200 power supply power supply rejection ratio psrr v s = 2.7 v to 12 v 80 110 db ?40c t a +125c 75 110 db supply current/amplifier i sy v o = 0 v 220 400 a ?40c t a +125c 350 500 a dynamic performance slew rate +sr r l = 10 k 0.4 v/s slew rate Csr r l = 10 k 0.4 v/s full-power bandwidth bw p 1% distortion 1.2 khz settling time t s to 0.01% 22 s gain bandwidth product gbp 3 mhz phase margin o 45 degrees channel separation cs f = 1 khz, r l = 10 k 145 db noise performance voltage noise e n p-p 0.1 hz to 10 hz 2 v p-p voltage noise density e n f = 1 khz 42 nv/hz current noise density i n 0.8 pa/hz
op191/op291/op491 rev. e | page 5 of 24 @ v o = 5.0 v, C4.9 v v cm +4.9 v, t a = +25c, unless otherwise noted. table 3. parameter symbol conditions min typ max unit input characteristics offset voltage op191 v os 80 500 v ?40c t a +125c 1 mv op291/op491 v os 80 700 v ?40c t a +125c 1.25 mv input bias current i b 30 65 na ?40c t a +125c 95 na input offset current i os 0.1 11 na ?40c t a +125c 22 na input voltage range ?5 +5 v common-mode rejection ratio cmrr v cm = 5 v 75 100 db ?40c t a +125c 67 97 db large signal voltage gain a vo r l = +10 k, v o = 4.7 v 25 70 ?40c t a +125c 50 v/mv offset voltage drift ?v os /?t 1.1 v/c bias current drift ?i b /?t 100 pa/c offset current drift ?i os /?t 20 pa/c output characteristics output voltage swing v o r l = 100 k to gnd 4.93 4.99 v ?40c to +125c 4.90 4.98 v r l = 2 k to gnd 4.80 4.95 v C40c t a +125c 4.65 4.75 v short-circuit limit i sc sink/source 8.75 16.00 ma ?40c to +125c 6 13 ma open-loop impedance z out f = 1 mhz, a v = 1 200 power supply power supply rejection ratio psrr v s = 5 v 80 110 db ?40c t a +125c 75 100 db supply current/amplifier i sy v o = 0 v 260 420 a ?40c t a +125c 390 550 a dynamic performance slew rate sr r l = 10 k 0.5 v/s full-power bandwidth bw p 1% distortion 1.2 khz settling time t s to 0.01% 22 s gain bandwidth product gbp 3 mhz phase margin o 45 degrees channel separation cs f = 1 khz 145 db noise performance voltage noise e n p-p 0.1 hz to 10 hz 2 v p-p voltage noise density e n f = 1 khz 42 nv/hz current noise density i n 0.8 pa/hz
op191/op291/op491 rev. e | page 6 of 24 10 100 0% 5v 200 s 5v input output v s =5v r l =2k ? a v =+1 v in =20vp-p 90 00294-006 figure 6. input and output wi th inputs overdriven by 5 v
op191/op291/op491 rev. e | page 7 of 24 absolute maximum ratings table 4. parameter rating supply voltage 16 v input voltage gnd to (v s + 10 v) differential input voltage 7 v output short-circuit duration to gnd indefinite storage temperature range n, r, ru packages ?65c to +150c operating temperature range op191g/op291g/op491g ?40c to +125c junction temperature range n, r, ru packages ?65c to +150c lead temperature (soldering, 60 sec) 300c thermal resistance ja is specified for the worst-case conditions; that is, ja is specified for device in socket for pdip packages; ja is specified for device soldered in circuit board for tssop and soic packages. table 5. thermal resistance package type ja jc unit 8-lead soic (r) 158 43 c/w 14-lead pdip (n) 76 33 c/w 14-lead soic (r) 120 36 c/w 14-lead tssop (ru) 180 35 c/w stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution absolute maximum ratings apply to both dice and packaged parts, unless otherwise noted.
op191/op291/op491 rev. e | page 8 of 24 typical performance characteristics 180 0 0.22 40 20 ?0.18 60 80 100 120 140 160 0.14 0.06 ?0.02 ?0.10 input offset voltage (mv) units v s = 3v t a = 25c based on 1200 op amps 00294-012 figure 7. op291 input offset voltage distribution, v s = 3 v 00294-013 units 120 0 7 60 20 1 40 0 100 80 6 432 input offset voltage (v/c) 5 v s = 3v ?40c < t a < +125c based on 600 op amps figure 8. op291 input offset voltage drift distribution, v s = 3 v 00294-014 input offset voltage (mv) 125 25 ?40 85 0 ?0.02 ?0.04 ?0.06 ?0.08 ?0.10 ?0.12 ?0.14 v s = 3v v cm = 3v temperature (c) v cm = 0.1v v cm = 0v v cm = 2.9v figure 9. input offset voltage vs. temperature, v s = 3 v 00294-015 input bias current (na) 40 30 20 10 0 ?10 ?20 ?30 ?40 ?50 ?60 125 25 85 temperature (c) ?40 v s = 3v v cm = 3v v cm = 2.9v v cm = 0.1v v cm = 0v figure 10. input bias current vs. temperature, v s = 3 v 00294-016 input offset current (na) 0 ?0.2 ?0.4 ?0.6 ?0.8 ?1.0 ?1.2 ?1.4 ?1.6 ?1.8 125 25 85 temperature (c) ?40 v cm = 0.1v v cm = 2.9v v cm = 3v v cm = 0v v s = 3v figure 11. input offset current vs. temperature, v s = 3 v 00294-017 input common-mode voltage (v) input bias current (na) 36 ?36 3.0 ?18 ?30 0.3 ?24 0 0 ?12 ?6 6 12 18 30 24 2.72.42.11.81.5 1.2 0.90.6 v s = 3v figure 12. input bias current vs . input common-mode voltage, v s = 3 v
op191/op291/op491 rev. e | page 9 of 24 00294-018 temperature (c) output voltage swing (v) 3.00 2.75 125 2.90 2.80 25 2.85 ?40 2.95 85 v s = 3v +v o @ r l = 100k ? +v o @ r l = 2k ? figure 13. output voltage swing vs. temperature, v s = 3 v 160 100 60 ?40 1k 80 100 120 140 ?20 0 20 40 90 ?90 ?45 0 45 frequency (hz) 10m 1m 100k 10k v s =3v t a = 25c 00294-019 open phase shift (degrees) open-loop gain (db) figure 14. open-loop gain and phase vs. frequency, v s = 3 v 00294-020 temperature (c) open-loop gain (v/mv) 1200 1000 800 600 400 200 0 125 25 ?40 85 r l = 100k ? , v cm = 2.9v v s = 3v, v o = 0.3v/2.7v r l = 100k ? , v cm = 0.1v figure 15. open-loop gain vs. temperature, v s = 3 v 00294-021 frequency (hz) closed-loop gain (db) 50 0 ?50 10 20 30 40 ?40 ?30 ?20 ?10 10 100 1k 10k 100k 1m 10m v s = 3v t a = 25c figure 16. closed-loop gain vs. frequency, v s = 3 v 00294-022 frequency (hz) cmrr (db) 160 60 ?40 80 100 120 140 ?20 0 20 40 cmrr v s = 3v t a = 25c 100 1k 10m 1m 100k 10k figure 17. cmrr vs. frequency, v s = 3 v 00294-023 temperature (c) cmrr (db) 90 84 125 87 85 25 86 ?40 89 88 85 v s = 3v figure 18. cmrr vs. temperature, v s = 3 v
op191/op291/op491 rev. e | page 10 of 24 00294-024 frequency (hz) psrr (db) 160 60 ?40 80 100 120 140 ?20 0 20 40 psrr v s = 3v t a = 25c +psrr ?psrr 100 1k 10m 1m 100k 10k figure 19. psrr vs. frequency, v s = 3 v 00294-025 temperature (c) psrr (db) 113 107 125 110 108 25 109 ?40 112 111 85 v s = 3v figure 20. psrr vs. temperature, v s = 3 v 00294-026 temperature (c) slew rate (v/s) 1.6 0 125 0.4 0.2 25 ?40 0.8 0.6 1.0 1.2 1.4 85 v s = 3v +sr ?sr figure 21. slew rate vs. temperature, v s = 3 v 00294-027 temperature (c) supply current/amplifier (ma) 0.35 0.05 125 0.20 0.10 25 0.15 ?40 0.30 0.25 85 v s = 3v figure 22. supply current vs. temperature, v s = +3 v, +5 v, 5 v 00294-028 frequency (hz) maximum output swing (v) 3.0 0 1m 1.0 0.5 100 1k 10k 100k 2.0 1.5 2.5 v in = 2.8v p-p v s = 3v a v = +1 r l = 100k ? figure 23. maximum output swing vs. frequency, v s = 3 v 00294-029 frequency (hz) voltage noise density (nv/ hz) 1k 10 10 100 1k 10k 100 figure 24. voltage noise density, v s = 5 v or 5 v
op191/op291/op491 rev. e | page 11 of 24 00294-030 input offset voltage (mv) units 70 0 0.50 30 10 20 ?0.50 60 40 50 0.30 0.10 ?0.10 ?0.30 v s = 5v t a = 25c based on 600 op amps figure 25. op291 input offset voltage distribution, v s = 5 v 00294-031 units 120 0 7 60 20 1 40 0 100 80 6 432 input offset voltage (v/c) 5 v s = 5v ?40c < t a < +125c based on 600 op amps figure 26. op291 input offset voltage drift distribution, v s = 5 v 00294-032 temperature (c) v os (mv) 0.15 ?0.10 125 0.05 ?0.05 25 0 ?40 0.10 85 v s = 5v v cm = 0v v cm = 5v figure 27. input offset voltage vs. temperature, v s = 5 v 00294-033 i b (na) 40 30 20 10 0 ?10 ?20 ?30 ?40 125 25 85 temperature (c) ?40 v s = 5v v cm = 5v v cm = 0v +i b ?i b ?i b +i b figure 28. input bias current vs. temperature, v s = 5 v 00294-034 input offset current (na) 1.4 1.6 1.2 1.0 0.8 0.6 0.4 0.2 0 ?0.2 125 25 85 temperature (c) ?40 v s =5v v cm =0v v cm =5v figure 29. input offset current vs. temperature, v s = 5 v 00294-035 common-mode input voltage (v) input bias current (na) 36 ?36 5 ?18 ?30 ?24 0 0 ?12 ?6 6 12 18 30 24 4 3 2 1 v s = 5v figure 30. input bias current vs. common-mode input voltage, v s = 5 v
op191/op291/op491 rev. e | page 12 of 24 00294-036 temperature (c) output voltage swing (v) 5.00 4.70 125 4.85 4.75 25 4.80 ?40 4.95 4.90 85 r l = 100k ? r l = 2k ? v s = 5v figure 31. output voltage swing vs. temperature, v s = 5 v 160 100 60 ?40 1k 80 100 120 140 ?20 0 20 40 frequency (hz) 10m 1m 100k 10k v s =5v t a = 25c 00294-037 90 ?90 ?45 0 45 open phase shift (degrees) open-loop gain (db) figure 32. open-loop gain and phase vs. frequency, v s = 5 v 00294-038 temperature (c) open-loop gain (v/mv) 140 0 125 60 20 25 40 ?40 120 80 100 85 v s = 5v r l = 100k ? , v cm = 5v r l = 2k ? , v cm = 5v r l = 2k ? , v cm = 0v r l = 100k ? , v cm = 0v figure 33. open-loop gain vs. temperature, v s = 5 v 00294-039 frequency (hz) closed-loop gain (db) 50 0 ?50 10 20 30 40 ?40 ?30 ?20 ?10 10 100 1k 10k 100k 1m 10m v s = 5v t a = 25c figure 34. closed-loop gain vs. frequency, v s = 5 v 00294-040 frequency (hz) cmrr (db) 160 60 ?40 80 100 120 140 ?20 0 20 40 cmrr v s =5v t a =25c 100 1k 10m 1m 100k 10k figure 35. cmrr vs. frequency, v s = 5v 00294-041 temperature (c) cmrr (db) 96 86 89 87 25 88 ?40 92 90 91 93 94 95 85 125 v s = 5v figure 36. cmrr vs. temperature, v s = 5 v
op191/op291/op491 rev. e | page 13 of 24 00294-042 frequency (hz) psrr (db) 160 60 ?40 80 100 120 140 ?20 0 20 40 psrr v s = 5v t a = 25c +psrr ?psrr 100 1k 10m 1m 100k 10k figure 37. psrr vs. frequency, v s = 5 v 00294-043 temperature (c) sr (v/s) 0.6 0 125 0.3 0.1 25 0.2 ?40 0.5 0.4 85 v s =5v +sr ?sr figure 38. op291 slew rate vs. temperature, v s = 5 v 00294-044 temperature (c) sr (v/s) 0.50 0 125 0.15 0.05 25 0.10 ?40 0.30 0.20 0.25 0.35 0.40 0.45 85 +sr ?sr v s = 5v figure 39. op491 slew rate vs. temperature, v s = 5 v 00294-045 temperature (c) short-circuit current (ma) 20 4 125 8 6 25 ?40 12 10 14 16 18 85 ?i sc , v s = +3v +i sc , v s = 5v ?i sc , v s = 5v +i sc , v s = +3v figure 40. short-circuit current vs. temperature, v s = +3 v, +5 v, 5 v 00294-046 frequency (hz) voltage ( v) 80 0 2500 20 10 0 40 30 50 60 70 2000 1500 1000 500 a 10k ? 10k ? 1k ? v in = 10v p-p @ 1khz b v o v s = 5v figure 41. channel separation, v s = 5 v 00294-047 frequency (hz) maximum output swing (v) 5.0 0 1.5 0.5 1.0 3.0 2.0 2.5 3.5 4.0 4.5 v in = 4.8v p-p v s = 5v a v = +1 r l = 100k ? 1m 100 1k 10k 100k figure 42. maximum output swing vs. frequency, v s = 5 v
op191/op291/op491 rev. e | page 14 of 24 00294-048 frequency (hz) maximum output swing (v) 10 0 2 6 4 8 0 1m 100 1k 10k 100k v in = 9.8v p-p v s = 5v a v = +1 r l = 100k ? figure 43. maximum output swing vs. frequency, v s = 5 v 00294-049 temperature (c) input offset voltage (mv) 0.15 ?0.10 125 0.05 ?0.05 25 0 ?40 0.10 85 v s =5v v cm =+5v v cm = ?5v figure 44. input offset voltage vs. temperature, v s = 5 v 00294-050 i b (na) 50 40 30 20 10 0 ?10 ?20 ?30 ?40 ?50 125 25 85 temperature (c) ?40 +i b ?i b ?i b v s = 5v v cm = +5v v cm = ?5v +i b figure 45. input bias current vs. temperature, v s = 5 v 00294-051 input offset current (na) 1.4 1.6 1.2 1.0 0.8 0.6 0.4 0.2 0 ?0.2 125 25 85 temperature (c) ?40 v s =5v v cm = ?5v v cm =+5v figure 46. input offset current vs. temperature, v s = 5 v 00294-052 common-mode input voltage (v) input bias current (na) 36 ?36 5 ?4 ?24 ?5 0 ?12 12 24 43210 ?1?2?3 v s = 5v figure 47. input bias current vs. common-mode voltage, v s = 5 v 00294-053 temperature (c) output voltage swing (v) 5.00 ?5.00 125 ?4.85 ?4.95 25 ?4.90 ?40 0 ?4.80 ?4.75 4.75 4.80 4.85 4.95 4.90 85 v s = 5v r l = 2k ? r l = 2k ? r l = 2k ? r l = 2k ? figure 48. output voltage swing vs. temperature, v s = 5 v
op191/op291/op491 rev. e | page 15 of 24 00294-054 frequency (hz) open-loop gain (db) 70 20 ?30 30 40 50 60 ?20 ?10 0 10 90 45 0 270 225 180 135 phase shift (degrees) 1k 10m 1m 100k 10k v s = 5v t a = 25c figure 49. open-loop gain and phase vs. frequency, v s = 5 v 00294-055 temperature (c) open-loop gain (v/mv) 200 0 125 65 25 25 40 ?40 120 80 100 140 160 180 85 v s = 5v r l = 2k ? r l = 2k ? figure 50. open-loop gain vs. temperature, v s = 5 v 00294-056 frequency (hz) closed-loop gain (db) 50 0 ?50 10 20 30 40 ?40 ?30 ?20 ?10 10 100 1k 10k 100k 1m 10m v s = 5v t a = 25c figure 51. closed-loop gain vs. frequency, v s = 5 v 00294-057 frequency (hz) cmrr (db) 160 60 ?40 80 100 120 140 ?20 0 20 40 cmrr v s = 5v t a = 25c 100 1k 10k 100k 1m 10m figure 52. cmrr vs. frequency, v s = 5 v 00294-058 temperature (c) cmrr (db) 102 92 125 95 93 25 94 ?40 98 96 97 99 100 101 85 v s = 5v figure 53. cmrr vs. temperature, v s = 5 v 00294-059 frequency (hz) psrr (db) 160 60 ?40 80 100 120 140 ?20 0 20 40 psrr v s = 5v t a = 25c 100 1k 10k 100k 1m 10m +psrr ?psrr figure 54. psrr vs. frequency, v s = 5 v
op191/op291/op491 rev. e | page 16 of 24 00294-060 temperature (c) psrr (db) 115 90 125 105 95 25 100 ?40 110 85 op491 op291 v s = 5v figure 55. op291/op491 psrr vs. temperature, v s = 5 v 00294-061 temperature (c) sr (v/s) 125 25 ?40 85 v s =5v 0.7 0 0.6 0.5 0.4 0.3 0.2 0.1 +sr ?sr figure 56. slew rate vs. temperature, v s = 5 v 00294-062 frequency (hz) output impedance ( ? ) 1k 0.1 1 10 100 1k 10k 100k 1m 2m v s = 3v a v = +100 a v = +10 a v = +1 figure 57. output im pedance vs. frequency 00294-078 frequency (hz) voltage noise density (nv/ hz) 1k 10 10 100 1k 10k 100 figure 58. voltage noise density, v s = 3 v 00294-063 100mv 500mv 1.00v 2.00s input output v s =3v r l = 200k ? 10 0% 90 100 figure 59. large signal transient response, v s = 3 v 0 0294-064 100mv 1.00v 2.00v input o utput 2.00s v s =5v r l = 200k ? a v =+1v/v 10 100 0% 90 figure 60. large signal transient response, v s = 5 v
op191/op291/op491 rev. e | page 17 of 24 theory of operation the op191/op291/op491 are single-supply, micropower amplifiers featuring rail-to-rail inputs and outputs. to achieve wide input and output ranges, these amplifiers employ unique input and output stages. in figure 61 , the input stage comprises two differential pairs, a pnp pair and an npn pair. these two stages do not work in parallel. instead, only one stage is on for any given input signal level. the pnp stage (transistor q1 and transistor q2) is required to ensure that the amplifier remains in the linear region when the input voltage approaches and reaches the negative rail. on the other hand, the npn stage (transistor q5 and transistor q6) is needed for input voltages up to and including the positive rail. for the majority of the input common-mode range, the pnp stage is active, as is shown in figure 12 . notice that the bias current switches direction at approximately 1.2 v to 1.3 v below the positive rail. at voltages below this, the bias current flows out of the op291, indicating a pnp input stage. above this voltage, however, the bias current enters the device, revealing the npn stage. the actual mechanism within the amplifier for switching between the input stages comprises transistor q3, transistor q4, and transistor q7. as the input common-mode voltage increases, the emitters of q1 and q2 follow that voltage plus a diode drop. eventually, the emitters of q1 and q2 are high enough to turn on q3, which diverts the 8 a of tail current away from the pnp input stage, turning it off. instead, the current is mirrored through q4 and q7 to activate the npn input stage. notice that the input stage includes 5 k series resistors and differential diodes, a common practice in bipolar amplifiers to protect the input transistors from large differential voltages. these diodes turn on whenever the differential voltage exceeds approximately 0.6 v. in this condition, current flows between the input pins, limited only by the two 5 k resistors. this characteristic is important in circuits where the amplifier may be operated open-loop, such as a comparator. evaluate each circuit carefully to make sure that the increase in current does not affect the performance. the output stage in op191 devices uses a pnp and an npn transistor, as do most output stages; however, q32 and q33, the output transistors, are actually connected with their collectors to the output pin to achieve the rail-to-rail output swing. as the output voltage approaches either the positive or negative rail, these transistors begin to saturate. thus, the final limit on output voltage is the saturation voltage of these transistors, which is about 50 mv. the output stage does have inherent gain arising from the collectors and any external load impedance. because of this, the open-loop gain of the amplifier is dependent on the load resistance. q1 8a 5k? q3 5k? ?in q5 q6 q11 q10 q8 q7 q4 q13 q15 q14 q12 q9 q16 q17 q18 q19 q20 q21 q24 q23 q22 q27 q26 q30 q31 q28 q25 q29 q32 v out q33 10pf +in q2 0 0294-065 figure 61. simpli fied schematic
op191/op291/op491 rev. e | page 18 of 24 input overvoltage protection as with any semiconductor device, whenever the condition exists for the input to exceed either supply voltage, check the input overvoltage characteristic. when an overvoltage occurs, the amplifier could be damaged depending on the voltage level and the magnitude of the fault current. figure 62 shows the characteristics for the op191 family. this graph was generated with the power supplies at ground and a curve tracer connected to the input. when the input voltage exceeds either supply by more than 0.6 v, internal pn junctions energize, allowing current to flow from the input to the supplies. as described, the op291/op491 do have 5 k resistors in series with each input to help limit the current. calculating the slope of the current vs. voltage in the graph confirms the 5 k resistor. +2ma +1ma ?1ma ?2ma ?5v +10v ?10v +5v v in i in 00294-066 figure 62. input overvo ltage characteristics this input current is not inherently damaging to the device as long as it is limited to 5 ma or less. for an input of 10 v over the supply, the current is limited to 1.8 ma. if the voltage is large enough to cause more than 5 ma of current to flow, then an external series resistor should be added. the size of this resistor is calculated by dividing the maximum overvoltage by 5 ma and subtracting the internal 5 k resistor. for example, if the input voltage could reach 100 v, the external resistor should be (100 v/5 ma) ? 5 k = 15 k. this resistance should be placed in series with either or both inputs if they are subjected to the overvoltages. output voltage phase reversal some operational amplifiers designed for single-supply operation exhibit an output voltage phase reversal when their inputs are driven beyond their useful common-mode range. typically, for single-supply bipolar op amps, the negative supply determines the lower limit of their common-mode range. with these devices, external clamping diodes with the anode connected to ground and the cathode to the inputs prevent input signal excursions from exceeding the devices negative supply (that is, gnd), preventing a condition that could cause the output voltage to change phase. jfet input amplifiers can also exhibit phase reversal, and, if so, a series input resistor is usually required to prevent it. the op191 is free from reasonable input voltage range restrictions due to its novel input structure. in fact, the input signal can exceed the supply voltage by a significant amount without causing damage to the device. as shown in figure 64 , the op191 family can safely handle a 20 v p-p input signal on 5 v supplies without exhibiting any sign of output voltage phase reversal or other anomalous behavior. thus, no external clamping diodes are required. overdrive recovery the overdrive recovery time of an operational amplifier is the time required for the output voltage to recover to its linear region from a saturated condition. this recovery time is important in applications where the amplifier must recover quickly after a large transient event, such as a comparator. the circuit shown in figure 63 was used to evaluate the opx91 overdrive recovery time. the opx91 takes approximately 8 s to recover from positive saturation and approximately 6.5 s to recover from negative saturation. + ? 1/2 op291 3 2 1 r1 9k? r2 10k? r3 10k? v in 10v step v s = 5v v out 00294-068 figure 63. overdrive recovery time test circuit 10 90 100 0% time (200s/div) v in (2.5v/div) 10 90 100 0% time (200s/div) v out (2v/div) 20mv 20mv 5s 5s +5v ?5v v in 20v p-p v out 8 1 3 2 4 1/2 op291 + ? 00294-067 figure 64. output voltage phase reversal behavior
op191/op291/op491 rev. e | page 19 of 24 applications information single 3 v supply, instrumentation amplifier the op291 low supply current and low voltage operation make it ideal for battery-powered applications, such as the instrumentation amplifier shown in figure 65 . the circuit uses the classic two op amp instrumentation amplifier topology, with four resistors to set the gain. the equation is simply that of a noninverting amplifier, as shown in figure 65 . the two resistors labeled r1 should be closely matched both to each other and to the two resistors labeled r2 to ensure good common-mode rejection performance. resistor networks ensure the closest matching as well as matched drifts for good temperature stability. capacitor c1 is included to limit the bandwidth and, therefore, the noise in sensitive applications. the value of this capacitor should be adjusted depending on the desired closed- loop bandwidth of the instrumentation amplifier. the rc combination creates a pole at a frequency equal to 1/(2 r1c1). if ac-cmrr is critical, then a matched capacitor to c1 should be included across the second resistor labeled r1. 1/2 op291 1/2 op291 r1 r2 r2 r1 3 v c1 100pf v in v out v out = (1 + ) = v in r1 r2 ? 00294-069 3 2 1 8 5 6 4 7 + figure 65. single 3 v supply instrumentation amplifier because the op291 accepts rail-to-rail inputs, the input common-mode range includes both ground and the positive supply of 3 v. furthermore, the rail-to-rail output range ensures the widest signal range possible and maximizes the dynamic range of the system. also, with its low supply current of 300 a/device, this circuit consumes a quiescent current of only 600 a yet still exhibits a gain bandwidth of 3 mhz. a question may arise about other instrumentation amplifier topologies for single-supply applications. for example, a variation on this topology adds a fifth resistor between the two inverting inputs of the op amps for gain setting. while that topology works well in dual-supply applications, it is inherently inappropriate for single-supply circuits. the same could be said for the traditional three op amp instrumentation amplifier. in both cases, the circuits simply cannot work in single-supply situations unless a false ground between the supplies is created. single-supply rtd amplifier the circuit in figure 66 uses three op amps of the op491 to develop a bridge configuration for an rtd amplifier that operates from a single 5 v supply. the circuit takes advantage of the op491 wide output swing range to generate a high bridge excitation voltage of 3.9 v. in fact, because of the rail-to-rail output swing, this circuit works with supplies as low as 4.0 v. amplifier a1 servos the bridge to create a constant excitation current in conjunction with the ad589, a 1.235 v precision reference. the op amp maintains the reference voltage across the parallel combination of the 6.19 k and 2.55 m resistors, which generate a 200 a current source. this current splits evenly and flows through both halves of the bridge. thus, 100 a flows through the rtd to generate an output voltage based on its resistance. a 3-wire rtd is used to balance the line resistance in both 100 legs of the bridge to improve accuracy. 1/4 op491 v out 365? 365? 1/4 op491 100k ? 0.01pf a3 5v gain = 274 100k ? 1/4 op491 37.4k ? 5v ad589 2.55m ? 6.19k ? 200 ? 10 turns 26.7k ? 26.7k ? a2 a1 100 ? 100? rtd all resistors 1% or better 00294-070 figure 66. single-supply rtd amplifier amplifier a2 and amplifier a3 are configured in the two op amp instrumentation amplifier topology described in the single 3 v supply, instrumentation amplifier section. the resistors are chosen to produce a gain of 274, such that each 1c increase in temperature results in a 10 mv change in the output voltage, for ease of measurement. a 0.01 f capacitor is included in parallel with the 100 k resistor on amplifier a3 to filter out any unwanted noise from this high gain circuit. this particular rc combination creates a pole at 1.6 khz.
op191/op291/op491 rev. e | page 20 of 24 a 2.5 v reference from a 3 v supply in many single-supply applications, the need for a 2.5 v reference often arises. many commercially available monolithic 2.5 v references require a minimum operating supply voltage of 4 v. the problem is exacerbated when the minimum operating system supply voltage is 3 v. the circuit illustrated in figure 67 is an example of a 2.5 v reference that operates from a single 3 v supply. the circuit takes advantage of the op291 rail-to-rail input and output voltage ranges to amplify an ad589 1.235 v output to 2.5 v. the op291 low tcv os of 1 v/c helps maintain an output voltage temperature coefficient of less than 200 ppm/c. the circuit overall temperature coefficient is dominated by the temperature coefficient of r2 and r3. lower temperature coefficient resistors are recommended. the entire circuit draws less than 420 a from a 3 v supply at 25c. resistors = 1%, 100ppm/c potentiometer = 10 turn, 100ppm/c r3 100k ? 1/2 op291 r2 100k ? 3v r1 5k? 2.5v ref r1 17.4k ? a d589 3v 3 2 1 8 4 00294-071 figure 67. a 2.5 v reference that operates on a single 3 v supply 5 v only, 12-bit dac swings rail-to-rail the opx91 family is ideal for use with a cmos dac to generate a digitally controlled voltage with a wide output range. figure 68 shows the dac8043 used in conjunction with the ad589 to generate a voltage output from 0 v to 1.23 v. the dac is operated in voltage switching mode, where the reference is connected to the current output, i out , and the output voltage is taken from the v ref pin. this topology is inherently noninverting as opposed to the classic current output mode, which is inverting and, therefore, unsuitable for single supply. 5v r1 17.8k ? a d589 r2 r3 r4 232 ? 1% 32.4k ? 1% 100k ? 1% v out = ???? (5v) d 4096 gnd clk sr1 4765 digital control ld v ref r fb v dd i out 2 3 8 1.23v 5 v dac8043 1/2 op291 3 2 1 8 4 1 00294-072 figure 68. 5 v only, 12-bit dac swings rail-to-rail the op291 serves two functions. first, it is required to buffer the high output impedance of the dac v ref pin, which is on the order of 10 k. the op amp provides a low impedance output to drive any following circuitry. second, the op amp amplifies the output signal to provide a rail-to-rail output swing. in this particular case, the gain is set to 4.1 to generate a 5.0 v output when the dac is at full scale. if other output voltage ranges are needed, such as 0 v to 4.095 v, the gain can easily be adjusted by altering the value of the resistors. a high-side current monitor in the design of power supply control circuits, a great deal of design effort is focused on ensuring a pass transistors long- term reliability over a wide range of load current conditions. as a result, monitoring and limiting device power dissipation is of prime importance in these designs. the circuit illustrated in figure 69 is an example of a 5 v, single-supply, high-side current monitor that can be incorporated into the design of a voltage regulator with fold-back current limiting or a high current power supply with crowbar protection. this design uses an op291 rail-to-rail input voltage range to sense the voltage drop across a 0.1 current shunt. a p-channel mosfet used as the feedback element in the circuit converts the op amp differential input voltage into a current. this current is then applied to r2 to generate a voltage that is a linear representation of the load current. the transfer equation for the current monitor is given by l sense i r r routput monitor ? ? ? ? ? ? = 1 2 for the element values shown, the monitor output transfer characteristic is 2.5 v/a. 5v r sense 0.1 ? 5v 5v i l s g m1 3n163 d r2 2.49k ? monitor output r1 100 ? 1/2 op291 3 2 1 8 4 00294-073 figure 69. a high-side load current monitor
op191/op291/op491 rev. e | page 21 of 24 a 3 v, cold junction compensated thermocouple amplifier the op291 low supply operation makes it ideal for 3 v battery- powered applications such as the thermocouple amplifier shown in figure 70 . the k-type thermocouple terminates in an isothermal block where the junction ambient temperature is continuously monitored using a simple 1n914 diode. the diode corrects the thermal emf generated in the junctions by feeding a small voltage, scaled by the 1.5 m and 475 resistors, to the op amp. to calibrate this circuit, immerse the thermocouple measuring junction in a 0c ice bath and adjust the 500 potentiometer to 0 v out. next, immerse the thermocouple in a 250c temperature bath or oven and adjust the scale adjust potentiometer for an output voltage of 2.50 v. within this temperature range, the k-type thermocouple is accurate to within 3c without linearization. 8 1 4 3 2 op291 500? 10 turn zero adjust 24.3k ? 1% 7.15k ? 1% 24.9k ? 1% 2.1k ? 1% 475? 1% 1.5m ? 1% 1n914 al cr isothermal block alumel chromel cold junctions k-type thermocouple 40.7 v/c 10k? 3.0v ad589 1.33m ? 20k? scale adjust v out 0v = 0c 3v = 300c 1.235 v 11.2mv 4.99k ? 1% 00294-074 1/2 figure 70. a 3 v, cold junction compensated thermocouple amplifier single-supply, direct access arrangement for modems an important building block in modems is the telephone line interface. in the circuit shown in figure 71 , a direct access arrangement is used to transmit and receive data from the telephone line. amplifier a1 is the receiving amplifier; amplifier a2 and amplifier a3 are the transmitters. the fourth amplifier, a4, generates a pseudo ground halfway between the supply voltage and ground. this pseudo ground is needed for the ac-coupled bipolar input signals. the transmit signal, txa, is inverted by a2 and then reinverted by a3 to provide a differential drive to the transformer, where each amplifier supplies half the drive signal. this is needed because of the smaller swings associated with a single supply as opposed to a dual supply. amplifier a1 provides some gain for the received signal, and it also removes the transmit signal present at the transformer from the received signal. to do this, the drive signal from a2 is also fed to the noninverting input of a1 to cancel the transmit signal from the transformer. rxa 1/4 op491 37.4k ? a1 3.3k ? 0.0047 f a2 20k ? ,1% 475 ? ,1% 0.033 f 37.4k ? ,1% 390p f 750pf 0.1 f 0.1 f a3 t1 1:1 5.1v to 6.2v zener 5 a4 100k ? 100k ? 3v or 5v 10 f0.1 f 20k? ,1% 20k ? ,1% 20k? ,1% txa 20k? ,1% 13 12 14 8 10 9 1/4 op491 7 6 5 1/4 op491 3 1 2 1/4 op491 4 11 0 0294-075 figure 71. single-supply, direct access arrangement for modems the op491 bandwidth of 3 mhz and rail-to-rail output swings ensure that it can provide the largest possible drive to the transformer at the frequency of transmission.
op191/op291/op491 rev. e | page 22 of 24 3 v, 50 hz/60 hz active notch filter with false ground the filter section uses a pair of op491s in a twin-t configuration whose frequency selectivity is very sensitive to the relative matching of the capacitors and resistors in the twin-t section. mylar is the material of choice for the capacitors, and the relative matching of the capacitors and resistors determines the pass band symmetry of the filter. using 1% resistors and 5% capacitors produces satisfactory results. to process ac signals in a single-supply system, it is often best to use a false ground biasing scheme. figure 72 illustrates a circuit that uses this approach. in this circuit, a false-ground circuit biases an active notch filter used to reject 50 hz/60 hz power line interference in portable patient monitoring equipment. notch filters are quite commonly used to reject power line frequency interference that often obscures low frequency physiological signals, such as heart rates, blood pressure readings, eegs, and ekgs. this notch filter effectively squelches 60 hz pickup at a filter q of 0.75. substituting 3.16 k resistors for the 2.67 k resistors in the twin-t section (r1 through r5) configures the active filter to reject 50 hz interference. single-supply, half-wave, and full-wave rectifiers an opx91 device configured as a voltage follower operating on a single supply can be used as a simple half-wave rectifier in low frequency (<2 khz) applications. a full-wave rectifier can be configured with a pair of op291s, as illustrated in figure 73 . the circuit works in the following way. when the input signal is above 0 v, the output of amplifier a1 follows the input signal. because the noninverting input of amplifier a2 is connected to the output of a1, op amp loop control forces the inverting input of the a2 to the same potential. the result is that both terminals of r1 are equipotential; that is, no current flows. because there is no current flow in r1, the same condition exists for r2; thus, the output of the circuit tracks the input signal. when the input signal is below 0 v, the output voltage of a1 is forced to 0 v. this condition now forces a2 to operate as an inverting voltage follower because the noninverting terminal of a2 is also at 0 v. the output voltage at v out a is then a full-wave rectified version of the input signal. if needed, a buffered, half-wave rectified version of the input signal is available at v out b. r11 100k ? v ou t r1 2.67k ? r3 2.67k ? a1 1/4 op491 3v v in r6 100k ? 0.01 f c5 a3 r12 499? c6 1.5v 1 f 3v r9 1m ? r10 1m ? c4 1 f c2 r4 2.67k ? a2 r5 1.33k ? (2.67k ? 2) r7 1k? r8 1k? c1 1 f1 f r2 2.67k ? 1 2 4 3 11 1/4 op491 7 6 5 9 1/4 op491 10 8 00294-076 c3 2 f (1 f 2) 10 (1v/div) (0.5v/div) (0.5v/div) time (200 s/div) r1 100k ? a1 5v v in 2v p- p <2khz r2 100k ? 1/2 op291 a2 v out a v out b full-wave rectified output half-wave rectified output 6 7 5 1/2 op291 2 1 3 4 8 1v 500mv v out a v in v out b 90 100 0% 00294-077 500mv 200 s figure 72. a 3 v single-supply, 50 hz/60 hz active notch filter with false ground amplifier a3 is the heart of the false ground bias circuit. it buffers the voltage developed by r9 and r10 and is the reference for the active notch filter. because the op491 exhibits a rail-to-rail input common-mode range, r9 and r10 are chosen to split the 3 v supply symmetrically. an in-the-loop compensation scheme used around the op491 allows the op amp to drive c6, a 1 f capacitor, without oscillation. c6 maintains a low impedance ac ground over the operating frequency range of the filter. figure 73. single-supply, half-w ave, and full-wave rectifiers using an op291
op191/op291/op491 rev. e | page 23 of 24 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 74. 8-lead standard small outline package [soic_n] narrow body (r-8) [s-suffix] dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-ab 060606-a 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarity 0.10 8 0 45 figure 75. 14-lead standard small outline package [soic_n] narrow body (r-14) [s-suffix] dimensions shown in millimeters and (inches) compliant to jedec standards mo-153-ab-1 061908-a 8 0 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 0.75 0.60 0.45 coplanarity 0.10 seating plane figure 76. 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters
op191/op291/op491 rev. e | page 24 of 24 compliant to jedec standards ms-001 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. 070606-a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.070 (1.78) 0.050 (1.27) 0.045 (1.14) 14 1 7 8 0.100 (2.54) bsc 0.775 (19.69) 0.750 (19.05) 0.735 (18.67) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) gauge plane 0.210 (5.33) max seating plane 0.015 (0.38) min 0.005 (0.13) min 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) figure 77. 14-lead plastic dual in-line package [pdip] (n-14) dimensions shown s and (millimeters) ordering guide temperature range package description package option [p-suffix] in inche model 1 op191gs ?40c to +125c 8-lead soic_n r-8 [s-suffix] op191gs-reel ?40c to +125c 8-lead soic_n r-8 [s-suffix] op191gs-reel7 ?40c to +125c 8-lead soic_n r-8 [s-suffix] op191gsz ?40c to +125c 8-lead soic_n r-8 [s-suffix] OP191GSZ-REEL ?40c to +125c 8-lead soic_n r-8 [s-suffix] OP191GSZ-REEL7 ?40c to +125c 8-lead soic_n r-8 [s-suffix] op291gs ?40c to +125c 8-lead soic_n r-8 [s-suffix] op291gs-reel ?40c to +125c 8-lead soic_n r-8 [s-suffix] op291gs-reel7 ?40c to +125c 8-lead soic_n r-8 [s-suffix] op291gsz ?40c to +125c 8-lead soic_n r-8 [s-suffix] op291gsz-r eel ?40c to +125c 8-lead soic_n r-8 [s-suffix] op291gsz-reel7 ?40c to +125c 8-lead soic_n r-8 [s-suffix] op491gp ?40c to +125c 14-lead pdip n-14 [p-suffix] op491gpz ?40c to +125c 14-lead pdip n-14 [p-suffix] op491gru-ree l ?40c to +125c 14-lead tssop ru-14 op491gruz-reel ?40c to +125c 14-lead tssop ru-14 op491gs ?40c to +125c 14-lead soic_n r-14 [s -suffix] op491gs-reel ?40c to +125c 14-lead soic_n r-14 [s-suffix] op491gs-reel7 ?40c to +125c 14-lead soic_n r-14 [s-suffix] op491gsz ?40c to +125c 14-lead soic_n r-14 [s-suffix] op491gsz-reel ?40c to +125c 14-lead soic_n r-14 [s-suffix] op491gsz-reel7 ?40c to +125c 14-lead soic_n r-14 [s-suffix] 1 z = rohs compliant pa rt. ?1994C2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d00294-0-4/10(e)

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